A flash ADC includes a series of comparators to compare an analog input voltage to a series of reference voltages. The output of the ADC corresponds to the reference voltage closest to, but not exceeding, the input voltage. However, manufacturing imperfections, such as offsets, can cause a comparator to effectively compare the analog input voltage to a different value than the nominal reference voltage associated with that comparator. Accordingly, correction is applied to the comparators to compensate for these imperfections.
Previously, efforts were made to provide offset correction in a ΔΣ ADC including a loop filter connected to an internal flash ADC. In this effort, blocks of the ADC were taken offline, and a DC-calibration scheme was performed. Specifically, the comparators in the ADC were first disconnected from the loop filter. Then, a static input (generally, common-mode) was applied both to the input and as the reference voltage of a comparator. Calibration codes of the comparator were swept from the lowest values to the highest values until the output of the comparator toggled. The code toggling the output of the comparator indicated an estimate of that comparator's offset. The procedure was then repeated for every comparator in the flash ADC. The comparators were reconnected to the loop filter, using the indicated calibration trim codes, for normal operation.